Get Started with SoC Blockset

SoC Blockset™ enables you to simulate and analyze the performance of algorithms on programmable SoCs and ASICs. You can deploy these algorithms as hardware and software applications for prototyping and production.

The blockset lets you build models of hardware architectures by defining interfaces between processor cores, programmable logic, memory, and peripherals. You can use the models to partition algorithms between programmable logic and processors to analyze the tradeoffs between hardware and software implementation. The blockset also lets you specify task scheduling of software applications.

The SoC Builder app automates deployment by building IP cores and software for ARM^® cores and programming development boards from Simulink^® (with HDL Coder™ and Embedded Coder^®).

SoC Blockset supports the analysis of deployed applications in hardware with performance diagnostics and software profiling tools. Supported devices include Xilinx^® Zynq^®-7000 SoCs, Zynq UltraScale+™ MPSoCs/RFSoCs, and Versal^® ACAPs, as well as Intel^® SoC FPGAs.

Tutorials

• Use Template to Create SoC Model
  

  Create SoC models using Simulink Project templates.

• Create an SoC Project Application
  

  Step by step instructions and guidelines to create an SoC Blockset project and models for an SoC application.

Featured Examples

Streaming Data from Hardware to Software

A systematic approach to design the data-path between hardware logic (FPGA) and embedded processor using SoC Blockset.

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