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Deploy NR HDL Reference Applications on FPGAs and SoCs

This section contains the list of examples that show how to deploy 5G Wireless HDL Toolbox™ reference applications on FPGAs and SoCs.

5G NR MIB Recovery Using Analog Devices AD9361/AD9364 (Communications Toolbox Support Package for Xilinx Zynq-Based Radio): Deploy the MIB recovery algorithm.
5G NR MIB Recovery Using Xilinx RFSoC Device (SoC Blockset): Simulate and deploy a 5G NR MIB Recovery algorithm.
5G NR SIB1 Recovery Using Analog Devices AD9361/AD9364 (Communications Toolbox Support Package for Xilinx Zynq-Based Radio): Deploy the system information block 1 (SIB1) recovery algorithm.
5G NR SIB1 Recovery for FR1 and FR2 Using Xilinx RFSoC Device (SoC Blockset): Deploy the 5G NR SIB1 recovery algorithm for FR1 and FR2.

For a more detailed description of the algorithm, see the NR HDL Downlink Receiver MATLAB Reference example.

These examples reuse the 5G Simulink® models to generate HDL for the FPGA logic. They use hardware-software co-design modeling techniques and hardware support packages to add all the software modeling and interfacing required to implement the algorithm in real-time on hardware.

Deploy NR HDL Reference Applications on FPGAs and SoCs

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