Model Design
This section contains information about how you can model your design in the
Simulink® environment by using blocks from all products
that support HDL code generation. To filter the Simulink Library Browser to show only
HDL-supported blocks, enter hdllib
.
In addition to the HDL Coder™ sublibrary, the supported block libraries include blocks from Simulink, Stateflow®, Communications Toolbox™, DSP System Toolbox™, Vision HDL Toolbox™, Wireless HDL Toolbox™, and HDL Verifier™ libraries.
The sections below contain links to documentation pages for blocks that are
only available in the HDL Coder Library. The links include blocks such as HDL FIFO, RAM blocks,
and the Multiply-Add block. Other blocks such as Add and
Delay are available with both hdllib
and other Block
Libraries. For a list of Simulink blocks
supported for HDL code generation, see Simulink Block List (HDL Code Generation). In this list,
you see blocks available in both Simulink and
HDL Coder libraries.
Categories
- Basic HDL Algorithms
Create simple HDL designs using basic Simulink blocks
- RAM and ROM Blocks
Mimic RAMs and ROMs on hardware using blocks in HDL RAMs library
- Hierarchical Designs and Synchronous Hardware Behavior
Create subsystems and hierarchical HDL designs with State Control block
- User-Defined MATLAB Functions
Create HDL-ready algorithms using blocks in User-Defined Functions library
- Stateflow Blocks
Create HDL-ready algorithms using blocks in Stateflow library
- HDL Applications for Signal Processing Algorithms
Create and run HDL applications using DSP HDL Toolbox™ and DSP System Toolbox blocks
- HDL Applications for Image Processing Algorithms
Create and run HDL applications using Vision HDL Toolbox blocks
- HDL Applications for Communication Algorithms
Create and run HDL applications using Communications Toolbox and Wireless HDL Toolbox blocks